紫焰 發問時間: 社會與文化語言 · 1 0 年前

急...請各位高手幫我翻譯以下的文章(不要翻譯軟體的) P1

Problem Overview:

Two units out of 11,000 had significant VDAC voltage accuracy drift when tested at 100°C. See Table below.

VDAC is measured at the EAOUT pin with the Error Amplifier configured in unity gain (see page 7 for a simplified block diagram of this test).

Problem symptoms & characteristics:

For unit #6, VDAC drops 65mV from 65°C to 100°C while the band gap reference voltage, which can be inferred through the voltage on the ROSC pin, is staying constant.

The VSETPT offset voltage, which is generated across an external 390 ohm resistor remains constant indicating the VSETPT bias current is OK.

The EA_offset voltage, which is V(EAOUT)-V(VSETPT), also remains constant so we can assume the Error Amplifier is OK.

The voltage drop is not in the form of a step as temperature increases therefore a state

change in the VID logic can be ruled out.

With this evidence, the blocks that could potentially cause this issue are the top level blocks DAC_REF_TRIM, DAC_R2R_SPLIT_VC and the GM_AMP.

There is another block located in the DAC_R2R_SPLIT_VC called the R2R_BIAS_AMP that could potentially contain the root cause.

These four schematics and the top level schematic are inserted in pages 2-6 below.

Note the highlighted red blocks indicate the potential problem blocks.

2 個解答

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  • 1 0 年前
    最佳解答

    Problem Overview:

    問題概述:

    Two units out of 11,000 had significant VDAC voltage accuracy drift when tested at 100°C. See Table below.

    在11,000件出廠設備中有二件在100°C的測試時, VD交流電壓的準確度有顯著漂移,見下表。

    VDAC is measured at the EAOUT pin with the Error Amplifier configured in unity gain (see page 7 for a simplified block diagram of this test).

    Problem symptoms & characteristics:

    利用誤差放大器,可測得在EA輸出接腳對整體增益之交流VD (此測試的簡化方塊圖見第七頁), 問題的症狀及特點:

    For unit #6, VDAC drops 65mV from 65°C to 100°C while the band gap reference voltage, which can be inferred推斷through the voltage on the ROSC pin, is staying constant.

    6號機組的交流VD由65°C至100℃下降了65mV,但從帶隙(band gap)參考電壓可以推斷ROSC接腳的電壓為常數。

    The VSETPT offset voltage, which is generated across an external 390 ohm resistor remains constant indicating the VSETPT bias current is OK.

    The EA_offset voltage, which is V(EAOUT)-V(VSETPT), also remains constant so we can assume the Error Amplifier is OK.

    誇過390歐姆的外部電阻所產生的VSETPT補償電壓維持不變,顯示VSETPT的偏壓電流正常,

    EA 的補償電壓V(EAOUT)-V(VSETPT)也保持為常數,讓我們可以假定誤差放大器無礙。

    The voltage drop is not in the form of a step as temperature increases therefore a state change in the logic can be ruled out.

    溫度升高造成的電壓下降不是階級狀的,因而在此邏輯下,可以排除VID狀態的變動。

    With this evidence, the blocks that could potentially cause this issue are the top level blocks DAC_REF_TRIM, DAC_R2R_SPLIT_VC and the GM_AMP.

    就這些證據發現,造成本次外流潛在問題的機座,是DAC_REF_TRIM、 DAC_R2R_SPLIT_VC及 GM_AMP等上層機座,

    There is another block located in the DAC_R2R_SPLIT_VC called the R2R_BIAS_AMP that could potentially contain the root cause.

    還有另一個在DAC_R2R_SPLIT_VC中稱為R2R的偏壓放大器,有可能包藏了問題的根源。

    These four schematics and the top level schematic are inserted in pages 2-6 below.

    Note the highlighted red blocks indicate the potential problem blocks.

    這四個示意圖和頂層示意圖插在下文2-6頁中, 請注意有潛在問題的機座顯示在凸顯的紅色方塊中。

  • 思璠
    Lv 4
    1 0 年前

    問題概述:兩台機組出11000顯著vdac電壓精度漂移測試時,在100°C的 見下表. vdac寬度在eaout銷與誤差放大器配置為單位增益(見第七頁了 簡化方框圖此試驗). 問題的症狀及特點:機組#6, vdacdrops65mv由65°C至100°c,而帶隙參考電壓 可以想見,通過電壓對rosc密碼,在下榻的常數. 該vsetpt抵消電壓 這是全國所產生的外部390歐姆電阻保持不變,顯示vsetpt偏流大礙. ea_offset的電壓,這是五(eaout)與V(vsetpt),也仍然不斷,讓我們可以假定誤差放大器大礙. 壓降是形式上不是一個步驟,因為氣溫升高,因此一個國家改變了 vid邏輯可以排除. 有這方面的證據,座有可能造成這個問題的最高層塊dac_ref_trim, dac_r2r_split_vc和gm_amp. 還有另一座設在dac_r2r_split_vc稱為r2r_bias_amp有可能含有的根源. 這四個schematics和頂層示意圖插入頁2-6下文. 注意突出紅磚顯示潛在問題座.

    有些是專有名詞無法翻譯 請見諒

    參考資料: 字典
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